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Get "Up to Speed" with Cray Cascade - 11-14 March 2013

 

CSCS next flagship system to be brought into production in April 2013 is a Cray XC30 (Cascade) system with a peak performance of 750 Teraflops using Intel Sandy Bridge processors and with a new network interface chip and an advanced interconnect topology. The CSCS system is currently the largest Cray XC30 in the world with 2256 compute nodes, over 36,000 compute cores and 70 Terabytes of memory with a five-fold increase in system bisection network bandwidth compared to Monte Rosa.

This three and a half day course gives an introduction to the Cray XC30 at CSCS, demonstrates how to get the best performance out of the Intel Sandy Bridge processors and shows how to take full advantage of the interconnect. Experts from Intel will dive into the features of the Sandy Bridge processor and demonstrate the use of the Intel tools for generating optimised code and Cray specialists will show how to use their set of tools and numerical libraries and how to take full advantage of the MPI libraries and communication strategies.

The course will be rich in hands-on practical sessions to demonstrate the tools and techniques.

Registration deadline: March 4, 2013.  

Please contact Neil Stringfellow (neil.stringfellow(at)cscs.ch) or Sadaf Alam (sadaf.alam(at)cscs.ch)  for further technical informations.

Instructors

Intel's High Performance Computing Team (Christopher Dahnken and Michael Klemm), Cray's Performance and Exascale Teams (Nathan Wichmann and Alfio Lazzaro) and CSCS own staff (Neil Stringfellow).

VenueCSCS, Via Trevano 131, Lugano     www.cscs.ch/about_us/visitor_information/index.html
Time
Day 1: 13:30 - 17:30; Day 2:  09:00 - 18:00; Day 3: 09:00 - 18:00; Day 4: 09:00 - 18:00
Prerequisites

Competency in Fortran or C++ or C, combined with MPI and OpenMP.

You will need to bring a laptop computer with the capability of ssh access to CSCS machines and the ability to display output from applications using the X11 window system.

Maximum number of participants 

30
Minimal number of participantsIf the minimal number of participants is not reached we reserve the right to cancel the course. You will be informed two weeks in advance.
Accommodation
Participants are kindly requested to make their own arrangements for accommodation

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Course Outline

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Day 1 (afternoon only) - Introduction to Piz Daint at CSCS

Cray will give an overview of the XC architecture in general and highlight major differences from previous XT/XE architectures.

CSCS staff will describe the particular configuration of the XC30 at CSCS - "Piz Daint" - the filesystems and external login environment. Best practices for using Slurm and ALPS interfaces will be demonstrated and useful tools in the operating environment will be shown with plenty of practical opportunity for participants to familiarise themselves with the usage of the machine.

Day 2 (full day) and Day 3 (morning) - Intel tuition on optimisation for Sandy Bridge processors

Experts from Intel will give a deep-dive into the Sandy Bridge architecture, demonstrate the usage of Intel tools including compilers and numerical libraries, and will have practical sessions on getting best performance through vectorization and threading.

Day 3 (afternoon) and Day 4 (full day) - Cray tuition on optimising for XC30 system

Cray specialists will describe the network architecture and demonstrate how to get the best from communication libraries, they will introduce the Cray programming environment including compilers, performance analysis tools and optimised numerical libraries, and show how to get the best from the Sandy Bridge processors and the XC30 system as a whole using their tools.

There will then be the opportunity for attendees to stay on for a fifth day to participate in the debugging course given by Allinea on the DDT debugging tool. Those people who wish to do so should register separately for that event here: www.cscs.ch/events/event_list/event_detail/index.html


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