Event Detail


Sorry, the registration period for this event is over.

Node-level Performance Engineering - 15-16 May 2014


CSCS is pleased to announce 2-day training course aimed to teach performance engineering approaches on the compute node level. "Performance engineering"  is intended as developing a thorough understanding of the interactions between software and hardware.

Registration deadline: May 8, 2014.

Please contact Themis Athanassiadou (themis.athanassiadou(at)cscs.ch) for further informations.


Prof. Gerhard Wellen and Dr. Georg Hager from RRZE, Germany

VenueCSCS, Via Trevano 131, Lugano http://www.cscs.ch/about/visitor_Information/index.html
Day 1: 09:30 - 17:30; Day 2:  09:00 - 17:30

You will need to bring a laptop computer with the capability of ssh access to CSCS machines and the ability to display output from applications using the X11 window system.

Maximum number of participants 

Minimal number of participantsIf the minimal number of participants is not reached we reserve the right to cancel the course. You will be informed two weeks in advance.
Participants are kindly requested to make their own arrangements for accommodation.




  • Intel and AMD x86 architectures
  • ccNUMA
  • Performance modeling & engineering approaches
  • Our Approach

Practical performance analysis

  • The LIKWID tools
  • Typical performance patterns

Microbenchmarks and the memory hierarchy                

  • Understanding the memory hierarchy

    • Data transfer between memory levels
    • Write allocate vs. NT stores
    • Modeling of cache hierarchies
    • Contention

  • NUMA effects - anisotropy and asymmetry

Typical node-level software overheads

  • Cost of synchronization
  • Work distribution

Example Problem: The 3D Jacobi solver

  • Core-level optimizations

    •  Blocking
    •  Non Temporal stores
    •  SIMD vectorization (SSE, AVX)

  • Multithreading - contention at different memory hierarchies
  • Temporal Blocking

Example Problem: The Lattice-Boltzmann Method (LBM)

  • Introduction
  • Roofline Model
  • Data layout
  • Non Temporal stores
  • Model  for in-cache data & multicore scaling
  • Sparse representation and options for propagation

Example Problem: Sparse Matrix-Vector Multiplication

  • Data layouts
  • Performance model - CPU vs. GPU
  • Bandwidth reduction

Example Problem:  A backprojection algorithm for CT reconstruction

  • The algorithm
  • Naïve analysis
  • Detailed analysis and performance model  
  • Optimizations

Energy & Parallel Scalability

  • Energy consumption of modern processors
  • The energy-to-solution metric
  • Performance engineering == power engineering
  • Case studies

Back to listing